Software Engineer II (C++)

Job Overview

As a Software Engineer II on the Innovus and Genus database team within Cadence’s Digital Design Implementation (DDI) business unit, you will design and build the database infrastructure that underpins some of the world’s most advanced chip‑design tools.

Your work will directly shape the performance, scalability, and reliability of EDA software used by leading semiconductor companies globally, enabling them to bring next‑generation integrated circuits to market faster and with greater confidence.

This is an opportunity to work on technically challenging, high‑impact problems at the heart of modern electronic design.

• Job Responsibilities
• Design, develop, and optimise EDA database infrastructure software, including data‑model enhancements, API definitions, and class implementations.
• Investigate and resolve customer‑reported defects, delivering robust fixes and clear root‑cause analysis within agreed timelines.
• Collaborate with application engineering teams to profile, benchmark, and improve database API performance and code quality.
• Reduce database memory footprint to support very large‑scale IC designs, enabling customers to tackle increasingly complex chips.
• Contribute to architectural discussions and technical design reviews, proposing solutions that balance performance, maintainability, and long‑term scalability.
• Write clean, well‑tested code and accompanying documentation that meets Cadence’s engineering standards.
• Participate actively in agile ceremonies—sprint planning, stand‑ups, and retrospectives—as a constructive team contributor.
• Stay current with relevant developments in EDA, database architecture, and AI‑assisted development tooling, and share insights with the broader team.
• Job Qualifications
• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or a related field—or equivalent professional experience.
• Minimum 2 years of professional software development experience in a relevant engineering environment.
• Strong proficiency in C++, including familiarity with modern C++ standards and best practices.
• Understanding of IC design data models, database architecture, and efficient data‑access algorithms.
• Experience working in UNIX and/or Linux development environments.
• Excellent software engineering fundamentals: clean code practices, debugging, testing, and performance analysis.
• Additional Skills/Preferences
• Experience with Tcl scripting in an EDA or automation context.
• Familiarity with Verilog Hardware Description Language.
• Knowledge of the IEEE 1801 Power Format (UPF) standard.
• Practical experience using AI‑assisted coding tools such as Git Hub Copilot, Claude Code, or similar to accelerate and improve development workflows.
• Additional Information

You will join a globally distributed team with colleagues across Europe, the United States, and Asia, collaborating across time zones in an inclusive, high‑trust environment.

The role supports hybrid working at either the Munich or Cambridge offices.

Core tools include C++, Tcl, Linux, and internal EDA toolchains.

You will work closely with application engineering teams and, where relevant, engage with customer‑facing technical colleagues.

Benefits

• Competitive salary
• 30 days of holiday per year
• Group Pension Plan
• Job Rad
• EGYM
• Wellpass
• Lunch vouchers
• 5 days paid time to volunteer
• Employee Stock Purchase Plan
• Opportunity to work for a Great Place to Work and Fortune 100 organization
• Equal Employment Opportunity

Cadence is committed to equal employment opportunity throughout all levels of the organization.

All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

E-Verify

Cadence participates in the E-Verify program in certain U. S. locations as required by law.

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