FPGA Design Engineer (VHDL) in Geneva

FPGA Design Engineer (VHDL) in Geneva

Geneva Vollzeit Vor Ort
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Ellisys is seeking brilliant people, who are highly analytical, capable of thinking “out-of-the-box”, and who are motivated to learn from the best. You will bring a strong programming background to the team, coupled with personal enthusiasm and high energy. Your work will be challenging and diverse and your creativity and proactive approach will be welcomed. You will be contributing to the world's best and most advanced protocol test solution for technologies such as USB, Bluetooth and Wi‑Fi.Strong programming background in VHDL or VerilogStrong experience in high-speed logic designExperience in the Xilinx tools suite is a plusExperience in gigabit transceivers, memory controllers, soft processors is a plusExperience in Xilinx Zynq SOC is a plusUnderstanding of Object Oriented design is a plusUSB, Bluetooth, Wi‑Fi or other communication protocol knowledge is a plusMust be analytical, creative and a good communicatorStrong team playerFluent English or FrenchThe job:Designing new software components for our protocol analyzers, traffic exercisers and compliance testersDefining and implementing creative algorithms and infrastructures for capturing, processing, storing and displaying large amount of dataFinding clever ways to present complex informationDesigning robust expert systems to validate complex scenariosThis position is open in Geneva, Switzerland. #J-18808-Ljbffr

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Ellisys Recruiting-Team