pbSenior/Principal Researcher – NPU / CPU Micro-architecture / Agentic AI /b /p pWe are currently partnered with a highly technical research organisation working on next-generation processor architectures for AI workloads. This role focuses on research and prototyping across NPU core micro-architecture, memory systems, and CPU architectures designed for agentic AI workloads, including rapid context switching, bursty compute, tool calling, agent-logic scheduling, and context management. /p h3Key responsibilities /h3 ul liResearch next-generation NPU core micro-architecture across frontend, execution, backend, and memory-system components. /li liInvestigate frontend mechanisms including branch prediction, BTBs, and instruction prefetching. /li liExplore register file organisation, issue and wake-up logic, and scalar, vector, and tensor functional units. /li liInvestigate NPU backend structures including TLBs, L1 caches, and scratchpads. /li liResearch cache hierarchies and memory systems capable of sustaining high bandwidth and low latency for compute units. /li liDesign and prototype CPU architectures tailored to agentic AI workloads, including tool calling, agent-logic scheduling, and context management. /li /ul h3Key requirements /h3 ul liPhD in Computer Science, Electrical Engineering, or a related field. /li liStrong background in Computer Architecture and Micro-architecture. /li liCreativity and ability to develop innovative technologies. /li liResearch experience and/or strong knowledge in one or more of the following: Computer Architecture and Micro-architecture of modern Intel, ARM, or AMD CPUs, Nvidia GPUs, or Google TPUs. /li liComputer architecture simulators including Gem5, ChampSim, Sniper, ZSim, or QFlex. /li liVector and matrix extensions including ARM SVE/SME or Intel SSE/AVX/AMX. /li liGPU programming models, including CUDA kernels and PTX/SASS instructions. /li /ul h3Keywords /h3 pNPU / Neural Processing Unit / CPU / Agentic AI / Agentic CPU / Computer Architecture / Micro-architecture / Core Micro-architecture / Branch Prediction / BTB / Instruction Prefetching / Register Files / Issue Logic / Wake-up Logic / Scalar Functional Units / Vector Functional Units / Tensor Units / TLB / L1 Cache / Scratchpads / Cache Hierarchy / Memory Systems / High Bandwidth / Low Latency / Context Switching / Bursty Compute / Thread-level Concurrency / SMT / 2-way SMT / Tool Calling / Agent-logic Scheduling / Context Management / Gem5 / ChampSim / Sniper / ZSim / QFlex / ARM SVE / ARM SME / Intel SSE / Intel AVX / Intel AMX / CUDA / PTX / SASS / GPU Programming / Micro-architecture Characterisation / Profiling / Bottleneck Analysis / Performance Monitoring Units / PMUs / Intel CPUs / ARM CPUs / AMD CPUs / Nvidia GPUs / Google TPUs / Computer Architecture Research / Processor Architecture / Research Prototyping / ASPLOS / ISCA / MICRO / HPCA /p pBy applying to this role, you understand that we may collect your personal data and process it in line with our privacy policy. /p #J-18808-Ljbffr
Senior/Principal Researcher – NPU / CPU Micro-architecture / Agentic AI Arbeitgeber: European Tech Recruit
Als Arbeitgeber bietet dieses weltweit anerkannte Deep-Tech-Unternehmen in München eine dynamische und innovative Arbeitsumgebung, die auf die Entwicklung bahnbrechender KI-Technologien fokussiert ist. Mitarbeiter profitieren von einem hybriden Arbeitsmodell, umfangreichen Weiterbildungsmöglichkeiten und einer offenen Unternehmenskultur, die Kreativität und Zusammenarbeit fördert. Die Möglichkeit, an der Spitze der Technologie zu arbeiten und einen echten Einfluss auf die Zukunft der KI zu haben, macht diese Position besonders attraktiv für talentierte Fachkräfte.
