ppbHuawei's vision is to enrich lives through communication and intelligent innovation. /b /p /brpAs a global leader in information and communications technology (ICT), Huawei drives innovation in artificial intelligence, cloud computing, and smart device technologies. Through its Carrier, Enterprise, and Consumer business groups, the company delivers advanced Network Infrastructure, Cloud and AI Platforms, and industry-leading devices. /p /brpHuawei supports 45 of the world’s top 50 telecom operators and serves one-third of the global population, with operations in over 170 countries and a workforce of more than 200,000 employees. /p /brpHuawei Technologies Switzerland AG contributes to this innovation through cutting-edge research, with offices in Zurich and Lausanne focusing on High-Performance Computing, Computer Architecture, Computer Vision, Robotics, Artificial Intelligence, Neuromorphic Computing, Wireless Technologies, Networking, and related fields. /p /brpWe are a unique team of innovative, diverse individuals who have come together from multiple backgrounds to create advanced Software and Compiler Architectures for general-purpose and AI computing systems. The people who work here are generalists, and we complement each other. /p /brpOur primary mission is driving new fundamental research and innovation to achieve breakthroughs in future computing systems. The passion for exploring uncharted territory makes us thrive. /p /brpWe seek a highly talented researcher to explore novel compiler technologies and toolchains for next-generation computing architectures (including CPUs, and AI accelerators) and analyze key software-hardware co-design trade-offs in coordination with cross-functional domain experts. /p /brh3Responsibilities /h3 /brul /brliTechnology Research - Design and validate efficient compiler infrastructures and algorithms. Key objectives include maximizing computational performance, optimizing memory utilization, and generating highly efficient hardware-specific code. /li /brliSoftware-Hardware Co-Optimization - Drive co-optimization efforts including kernel fusion, memory layout tuning, and operator scheduling for GPUs, TPUs, or custom accelerators. /li /brliTechnology Insight - Recognize and track technology trends across the compiler ecosystem, from traditional frameworks (LLVM, GCC) to modern AI stacks (MLIR, TVM, Triton). Propose novel technologies to improve compilation speed, execution performance, code size, and programmability. Additionally, participate in strategic and business planning discussions. /li /brliExternal Collaboration - Engage with local academic and industrial partners based on business requirements. Independently lead the development and operation of research collaboration projects. /li /br /ul /brh3Key Qualifications /h3 /brul /brliMSc or PhD in Computer Science, Software Engineering, or a related field. /li /brliAt least 1 year of relevant experience in compiler development, system software, or computer architecture. /li /brliDemonstrated expertise in compiler construction, covering front end parsing, middle end optimizations, and back end code generation. /li /brliStrong background and hands on experience with foundational compiler infrastructures (e.g., LLVM, GCC) and/or modern deep learning compilers (e.g., MLIR, Apache TVM, XLA) – highly preferred. /li /brliSolid compiler fundamentals backed by substantial experience, including deep understanding of traditional optimizations (auto vectorization, loop transformations, register allocation, instruction scheduling) as well as modern AI specific techniques (computational graph optimizations, operator fusion, polyhedral compilation). /li /brliExperience in code generation and performance tuning for specialized hardware (e.g., custom SoCs, GPUs, NPUs, DSPs, many core architectures). /li /brliStrong understanding of hardware software interfaces and interactions. Background in microarchitecture (memory hierarchies, instruction pipelines, SIMD/VLIW, on chip interconnects) is highly valued. /li /brliExperience in software hardware co optimization, MFU optimization, and AI solver optimization is strongly preferred. /li /brliProficiency in C/C++ (and ideally Python), with a track record of writing clean, maintainable, and highly optimized code for complex systems. /li /brliFluency in English (written and verbal), with excellent writing skills for clear and concise reporting. /li /br /ul /brh3Why join us /h3 /brul /brliCollaborate with world-class scientists and engineers in an open, curiosity-driven environment. /li /brliAccess to state-of-the-art technology and tools. /li /brliOpportunities for professional growth and development. /li /brliCompetitive salary, and a high quality of life in Zurich, at the center of Europe. /li /brliLast but certainly not least: be part of innovative projects that make a difference. /li /br /ul /p #J-18808-Ljbffr
Senior Researcher AI Compiler Architecture Arbeitgeber: Huawei
Huawei's Ohm Research Center in Nürnberg bietet eine dynamische und innovative Arbeitsumgebung, die von Teamgeist und intensivem Wissensaustausch geprägt ist. Als Senior Engineer im Bereich der Mittelspannungsumrichtersteuerung profitieren Sie von umfangreichen Weiterbildungsmöglichkeiten, einer vielfältigen und einladenden Kultur sowie gesunden Mahlzeiten in unserer renommierten Betriebskantine. Hier haben Sie die Möglichkeit, in einem kompetenten und motivierten Team selbstverantwortlich zu arbeiten und Ihre Karriere in einem globalen Unternehmen voranzutreiben.