Design Verification Engineer: FPGA/ASIC for AI

A leading semiconductor company in Lausanne is seeking a Design Verification Engineer to join their innovative team. This mid-senior level role involves developing methodologies, verifying complex designs (preferably FPGA or ASIC), and preparing verification plans. Candidates should have at least 5 years of experience in the semiconductor industry and extensive digital verification background. The position offers pre-IPO stock options and the chance to contribute to cutting-edge AI innovation.
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