I am exclusively recruiting for a SerDes Architecture and Modelling Engineer to join my client’s team in Lausanne, Switzerland. This is a research and architecture-focused position for an engineer who enjoys investigating new ideas, developing algorithms and creating models to explore the performance of next-generation high-speed communication systems.The role has a strong emphasis on research, innovation and developing new architectural concepts rather than simply implementing established designs.As a SerDes Architecture and Modelling Engineer, you will:Research and develop new concepts for high-speed serial communication systemsBuild system level models to investigate, compare and optimise new architecturesDevelop signal processing algorithms and evaluate their impact on link performanceUse MATLAB, Python or C++ to model communication systems and test new ideasWork with architects and IC designers to translate research concepts into practical transceiver architecturesAnalyse system limitations including signal integrity, noise, power and clock recoveryDefine link budgets and block-level specifications based on system requirementsSupport analog, digital and verification teams throughout the development processMy client is looking for an engineer with a strong research background in signal processing, communications, control theory or mathematical modelling.Relevant experience could include:Research and development of new communication or signal processing techniquesStrong understanding of digital algorithms and control theoryExperience developing and implementing signal processing algorithmsSystem-level modelling of digital communication systemsStrong programming skills in MATLAB, Python or C++Understanding of SerDes, clock recovery or other high-speed communication systemsKnowledge of signal integrity and analog circuit behaviourExperience with SPICE or Spectre would be usefulThe role is aimed at someone with 5+ years of experience in semiconductor, telecommunications, communications research or scientific software development.A Bachelor's degree or higher in Electrical Engineering, Electronic Engineering, Communications, Computer Science or a related field is expected.The SerDes Architecture and Modelling Engineer position would suit someone who enjoys working in an RD environment, challenging existing approaches and turning research ideas into new system architectures.The role requires a minimum of 3 days on-site in Lausanne. #J-18808-Ljbffr
SerDes Analog Architect Arbeitgeber: IC Resources
Unser Unternehmen ist ein hervorragender Arbeitgeber, der Ihnen die Möglichkeit bietet, in einem dynamischen und technisch anspruchsvollen Umfeld zu arbeiten. Hier können Sie Ihre Fähigkeiten als ASIC Project Manager voll entfalten, während Sie eng mit talentierten Ingenieurteams zusammenarbeiten und an innovativen Projekten mitwirken. Wir fördern eine offene und kollaborative Unternehmenskultur, die auf kontinuierliches Lernen und persönliche Entwicklung abzielt, und bieten Ihnen die Chance, aktiv zur Gestaltung unserer wachsenden Organisation beizutragen.
