Doctoral Thesis - Formal IP Interface Protocol Specification for Compatibility Checks and Verification (f/m/div)

#WeAreIn to create tiny chips and big careers. Curiosity drives progress. Will you drive it with us? As a PhD at Infineon, you\’ll collaborate with passionate minds, shape innovations that power tomorrow\’s world, and build a career where your expertise truly makes a difference. Are you in?

Your Role
As an industrial doctorate at Infineon, you will pursue a doctoral degree at a University and gain professional experience simultaneously – an ideal start for your career. Advance your research with us and profit from our vast network of doctoral candidates and the expertise of a university. Mentorship is handled by both professors and dedicated Infineon employees. The research is carried out in cooperation with the Technical University of Munich and under the supervision of Prof. Dr. Ulf Schlichtmann.

We are offering a doctoral thesis dealing with formalizing hardware IP interface and protocol specifications. IP-based design is widely used within industrial design flows for digital hardware. For one, it enables efficient reuse of single components. Second, IP parameterization and configuration, used with so-called Soft IP Cores, further increases reusability by allowing application-targeted adaptation. To facilitate interoperability of IP blocks and their configuration across different design tools, formats such as IP-XACT have been introduced and standardized. Still, such standardized IP formats are structural descriptions with only the observable effect of scaling the IP’s interface. Yet the behavior and implemented features within the interface are hidden and can only be determined by manual analysis. Thus, merely connecting two pin-compatible IPs does not guarantee successful communication between the components. Even if both components support the same bus protocol, many protocol features are optional, such as burst accesses, potentially resulting in runtime errors if connected IPs do not support the same feature set. To detect such incompatibilities early in the IP design and integration processes, this doctoral work aims to define a generalized interface protocol specification that specifies the features and signal sequences at an IP interface. Formally specifying the interface behavior also enables automated verification that the IP-internal logic implements the defined interface features.
The project is supported by a grant and continuous result documentation and interaction with the other partners of the collaboration will be part of the work.

Key responsibilities in your new role

• Conceptualization: Definition of an IP interface specification format; based on, or compatible with established IP formats
  Implementation and Automation: Implementation of compatibility checks between connected interfaces
• Verification: Automated generation of verification references
• Application: Continuous testing and evaluation of the developed methods on Infineon IPs in the context of RISC-V SoCs
• Collaboration: Interaction with external partners of the collaboration
• Methodology Improvement: Study existing approaches, prove the applicability and get feedback to enhance the methodology

The learnings out of the thesis will lead to:

• Interface and interconnect protocols
• IP parameterization and customization methods
• Generic IP and interface specification
• Methodology for automated verification in an industrial environment
• Modeling and Meta-Modeling
• Various Modeling and Abstraction concepts and their implementation

Your Profile
Qualifications and skills to help you succeed

• Education: Master’s degree in electrical engineering, computer science, or a related field with a very good academic track record
• Interests: You are interested in complex, interdisciplinary and interlinked tasks and should like to solve them together with colleagues
• Skills: Proficiency in Python
• Experience: Background in digital design and verification, experience with hardware description languages like VHDL or Verilog; knowledge about IP-level formats (e.g. IP-XACT, FuseSoC, etc.) is a plus
• Knowledge: Understanding of metamodeling, (template-based) code generation and/or model-driven architecture is a plus
• Soft Skills: You possess good presentation and communication skills that help you to present challenging issues clearly and simply
• Language: High proficiency in English, both spoken and written; German is a plus

Please attach your master´s grade transcript to your application.

Contact:
Britta Johansson

#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in?

We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels.
We look forward to receiving your resume, even if you do not entirely meet all the requirements of the job posting.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.