As a Digital Design Engineer on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Your Role
Support microarchitecture design and specification activities based on system‑level requirements Contribute to the development of scalable and reusable digital IPs to meet platform and project requirements Collaborate with cross‑functional teams, including system architects, software engineers, and validation teams, to support seamless product integration Work with analog design teams on interface protocols and mixed‑signal partitioning Perform RTL design and implementation of digital logic for infrastructure IPs in the area of POWER, CLOCK, RESET, SAFETY and CONTROL Assist with power intent design using UPF, Clock/Reset domain crossing (CDC/RDC) analysis, and DFT/ATPG integration Participate in synthesis, power/performance/area (PPA) optimization, and work closely with the physical design team to help achieve design closure Support verification teams in block‑level and system‑level verification activities, helping to debug and resolve identified issues Help ensure designs meet automotive safety standards by implementing required safety mechanisms Identify and help resolve technical issues related to design, timing, and functionality with support from senior team members Your Profile
Master’s degree in Electrical Engineering, Computer Engineering, or a related field 0–2 years of professional experience in digital design – Fresh graduates with strong academic projects are encouraged to apply Experience with internships or academic projects involving digital design or verification is a strong plus Knowledge of RTL coding using SystemVerilog or VHDL Experience with debugging digital circuits Strong problem‑solving skills and ability to work independently as well as in a team Excellent communication skills for cross‑functional collaboration Proficiency in English, German is a plus We are filling this position through one of our leasing partners. A valid work permit for Austria (RWR+ Card) or EU citizenship is a prerequisite for this position. Minimum salary of € 4,472.11 per month (paid 14 times per year) is guaranteed under the collective agreement for workers and employees of EEI. A higher payment is negotiable depending on your expertise and skills.
#J-18808-Ljbffr
Support microarchitecture design and specification activities based on system‑level requirements Contribute to the development of scalable and reusable digital IPs to meet platform and project requirements Collaborate with cross‑functional teams, including system architects, software engineers, and validation teams, to support seamless product integration Work with analog design teams on interface protocols and mixed‑signal partitioning Perform RTL design and implementation of digital logic for infrastructure IPs in the area of POWER, CLOCK, RESET, SAFETY and CONTROL Assist with power intent design using UPF, Clock/Reset domain crossing (CDC/RDC) analysis, and DFT/ATPG integration Participate in synthesis, power/performance/area (PPA) optimization, and work closely with the physical design team to help achieve design closure Support verification teams in block‑level and system‑level verification activities, helping to debug and resolve identified issues Help ensure designs meet automotive safety standards by implementing required safety mechanisms Identify and help resolve technical issues related to design, timing, and functionality with support from senior team members Your Profile
Master’s degree in Electrical Engineering, Computer Engineering, or a related field 0–2 years of professional experience in digital design – Fresh graduates with strong academic projects are encouraged to apply Experience with internships or academic projects involving digital design or verification is a strong plus Knowledge of RTL coding using SystemVerilog or VHDL Experience with debugging digital circuits Strong problem‑solving skills and ability to work independently as well as in a team Excellent communication skills for cross‑functional collaboration Proficiency in English, German is a plus We are filling this position through one of our leasing partners. A valid work permit for Austria (RWR+ Card) or EU citizenship is a prerequisite for this position. Minimum salary of € 4,472.11 per month (paid 14 times per year) is guaranteed under the collective agreement for workers and employees of EEI. A higher payment is negotiable depending on your expertise and skills.
#J-18808-Ljbffr
Digital Design Engineer (f/m/div) Arbeitgeber: Infineon Technologies
Als Arbeitgeber bietet Infineon eine inspirierende Arbeitsumgebung, in der Kreativität und technisches Know-how zusammenkommen, um die Zukunft der Technologie zu gestalten. Mit einem starken Fokus auf Vielfalt und Inklusion fördert das Unternehmen eine respektvolle Kultur, die den Austausch von Ideen und die Zusammenarbeit über Abteilungen hinweg unterstützt. Zudem profitieren Mitarbeiter von umfangreichen Entwicklungsmöglichkeiten und einer dynamischen Arbeitsatmosphäre, die es ihnen ermöglicht, an bahnbrechenden Projekten zu arbeiten und ihre Karriere voranzutreiben.
