Senior Digital Design Engineer in Unterensingen

Senior Digital ASIC Design Engineer - Mixed-Signal ASIC Böblingen, Germany | Senior/Expert LevelA global technology leader is looking for an Senior Digital ASIC Design Engineer to join a highly experienced hardware R&D team developing advanced semiconductor technology.This is a rare opportunity to take real ownership of complex ASICs from architecture through to silicon, working on sophisticated mixed-signal devices used in next-generation semiconductor test systems.The RoleLead digital ASIC/SoC design from concept and architecture through to siliconDevelop complex RTL/Verilog designs within mixed-signal ASICsDrive architecture, design and chip-level verificationWork closely with senior system, hardware and software engineersSolve challenging technical problems across the full ASIC lifecycleMentor junior engineers and act as a technical authority within the teamWhat We’re Looking For10+ years’ experience in digital ASIC/SoC designExpert-level RTL and Verilog skillsStrong understanding of the ASIC development and silicon lifecycleExperience with mixed-signal ASICs and CMOSBroad digital design expertise, this is not an FPGA-focused roleStrong technical communication and problem-solving skillsDegree in Electrical/Electronic Engineering or equivalentWhy Consider It?A chance to move beyond simply implementing designs and have genuine influence over architecture, technology and silicon.You’ll be joining a technically strong team working on highly complex hardware where experienced engineers are trusted to make decisions, solve difficult problems and shape the next generation of semiconductor technology.Böblingen, Germany. European candidates willing to relocate are welcome. Candidates already based in Germany are preferred. #J-18808-Ljbffr