We at Kandou are a team of passionate professionals striving to make a mark in the trajectory of the semiconductor industry. Our list of customers reads like a who’s is who of the technology world. If you love to be part of an adventure of a startup challenging established tech giants and you are a proactive problem-solver who is motivated by pushing your limits and challenging the status quo, we have an opportunity for you.
Kandou is actively seeking a resourceful FPGA Engineer contractor.
Responsibilities
FPGA concept and design definition
Close interaction with Verification engineers, Digital designers and validation/characterization engineers
Validation and bring-up of devices and FPGAs in the lab
Prototyping of new digital designs in FPGAs
FPGA design and verification of very high-speed digital circuits
Selection of FPGAs and tool set
Support for post-silicon lab bring-up, debug, characterization and productization.
Post processing of validation results in Python
Analysis and understanding of high-speed serial protocols (USB4, PCIe, DP and Physical Coding Layer (PCS) )
Close interaction with verification and physical implementation engineers to verify circuit functionality and compliance with area, timing and power requirements
Support and interact with internal/external customers on requirements, design specifications, performance results
Manage workload and schedules and report to internal management team and external customers
Skills
Strong interest in the design of FPGAs and blocks for multi-Gigabit serial and parallel data-link transceivers
Scripting (Python preferred) and tool setup skills.
Passionate about FPGAs and FPGA design
Knowledge of high-speed and low-power design techniques, and high-speed serial protocols is a plus
Self-motivated, with strong sense of ownership and responsibility.
Good communicator and team player with strong analytical skills
Strong RTL coding skills (SystemVerilog preferred)
Understanding of verification methodologies, in particular UVM, is an advantage.
Experience
5-10 years’ experience in designing for FPGA targets
Strong technical background in FPGA design, validation and verification
Proven experience in design and verification of FPGAs
Experience in industry standard FPGA tools for design, simulation and verification
Experience in digital high-speed blocks. High Speed interface competence and/or PCS experience would be a plus
Experience in prototyping digital designs in FPGAs
Proven experience with lab instruments and bench measurements for design validation
Experience using Python or other scripting language for design validation and data analysis
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Kandou is actively seeking a resourceful FPGA Engineer contractor.
Responsibilities
FPGA concept and design definition
Close interaction with Verification engineers, Digital designers and validation/characterization engineers
Validation and bring-up of devices and FPGAs in the lab
Prototyping of new digital designs in FPGAs
FPGA design and verification of very high-speed digital circuits
Selection of FPGAs and tool set
Support for post-silicon lab bring-up, debug, characterization and productization.
Post processing of validation results in Python
Analysis and understanding of high-speed serial protocols (USB4, PCIe, DP and Physical Coding Layer (PCS) )
Close interaction with verification and physical implementation engineers to verify circuit functionality and compliance with area, timing and power requirements
Support and interact with internal/external customers on requirements, design specifications, performance results
Manage workload and schedules and report to internal management team and external customers
Skills
Strong interest in the design of FPGAs and blocks for multi-Gigabit serial and parallel data-link transceivers
Scripting (Python preferred) and tool setup skills.
Passionate about FPGAs and FPGA design
Knowledge of high-speed and low-power design techniques, and high-speed serial protocols is a plus
Self-motivated, with strong sense of ownership and responsibility.
Good communicator and team player with strong analytical skills
Strong RTL coding skills (SystemVerilog preferred)
Understanding of verification methodologies, in particular UVM, is an advantage.
Experience
5-10 years’ experience in designing for FPGA targets
Strong technical background in FPGA design, validation and verification
Proven experience in design and verification of FPGAs
Experience in industry standard FPGA tools for design, simulation and verification
Experience in digital high-speed blocks. High Speed interface competence and/or PCS experience would be a plus
Experience in prototyping digital designs in FPGAs
Proven experience with lab instruments and bench measurements for design validation
Experience using Python or other scripting language for design validation and data analysis
#J-18808-Ljbffr
FPGA Engineer - 3 month contract, CH Arbeitgeber: Kandou
Kandou ist ein hervorragender Arbeitgeber, der seinen Mitarbeitern die Möglichkeit bietet, an der Spitze der KI-Infrastruktur zu arbeiten. Mit einem starken Fokus auf Innovation und Effizienz in einem dynamischen Arbeitsumfeld fördert Kandou nicht nur die berufliche Weiterentwicklung, sondern bietet auch eine unterstützende Teamkultur, die Zusammenarbeit und Wissensaustausch schätzt. Die Position des IT Network Support in der EU/CH/UK ermöglicht es Ihnen, an bedeutenden Projekten zu arbeiten und gleichzeitig von den Vorteilen einer flexiblen Arbeitsweise und einem engagierten Team zu profitieren.
