MACOM seeks an experienced layout engineer to collaborate with the design team on layout and verification of custom analog/mixed-signal IPs in our advanced semiconductor environment. You will lead full-custom IC layout, floor planning, and top-level integration, perform extraction, DRC/LVS/DFM checks, and coordinate with IP layout engineers to deliver robust, high-performance chips.Strong communication with circuit designers and attention to parasitics, IR drop, and electromigration are #J-18808-Ljbffr
