As a Mixed Signal Design/Verification Engineer at Melexis, you will verify the mixed-mode design (analog, digital and embedded software) of our products as based on high-level requirements.
More specifically, you will:
Be responsible for the mixed-signal functional verification of system functions.
Participate in the definition of the digital specification.
Develop high-level functional models and testbenches to support system simulation.
Perform detailed simulation and verification of top level analog, digital and embedded software functionality.
Act as an interface between system, analog, digital, software and test development.
Your profile
An engineering master degree in an electronic or microelectronic field
2-5 years of relevant experience as a verification engineer or designer in a microelectronics environment
Knowledge of high-level state-of-the-art verification languages and methodologies (SystemVerilog, UVM) is an asset
Knowledge of scripting in a Linux environment (Shell, Python and/or other) is an asset
Effective communication skills in English
We offer
A challenging job in a dynamic, high-tech international environment.
The opportunity to take ownership of your professional passion in order to contribute to the success of the company.
An enjoyable, team-oriented and professional atmosphere in a flat-structured organization.
Diversity & Inclusion Melexis is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, colour, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.
#J-18808-Ljbffr
More specifically, you will:
Be responsible for the mixed-signal functional verification of system functions.
Participate in the definition of the digital specification.
Develop high-level functional models and testbenches to support system simulation.
Perform detailed simulation and verification of top level analog, digital and embedded software functionality.
Act as an interface between system, analog, digital, software and test development.
Your profile
An engineering master degree in an electronic or microelectronic field
2-5 years of relevant experience as a verification engineer or designer in a microelectronics environment
Knowledge of high-level state-of-the-art verification languages and methodologies (SystemVerilog, UVM) is an asset
Knowledge of scripting in a Linux environment (Shell, Python and/or other) is an asset
Effective communication skills in English
We offer
A challenging job in a dynamic, high-tech international environment.
The opportunity to take ownership of your professional passion in order to contribute to the success of the company.
An enjoyable, team-oriented and professional atmosphere in a flat-structured organization.
Diversity & Inclusion Melexis is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, colour, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.
#J-18808-Ljbffr
Senior Mixed Signal Verification Engineer Arbeitgeber: Melexis
MELEXIS in Vaud, Schweiz, bietet eine dynamische und innovative Arbeitsumgebung, die sich auf die neuesten Technologien im Bereich Robotik konzentriert. Mitarbeiter profitieren von umfangreichen Entwicklungsmöglichkeiten, einem unterstützenden Team und der Chance, an bahnbrechenden Projekten zu arbeiten, die die Zukunft der Robotik gestalten. Die Unternehmenskultur fördert Vielfalt und Zusammenarbeit, was MELEXIS zu einem hervorragenden Arbeitgeber für talentierte Ingenieure macht.