Lead Application Engineer

• Job Title
• Lead Application Engineer
• Location
• Feldkirchen, Germany
• Reports to
• Application Engineering Director
• Job Overview

Join the front line of innovation, helping world‑class design teams harness Cadence’s most advanced digital implementation and AI‑enhanced verification and implementation solutions.

This role transforms complex design challenges into success stories by driving synthesis, low‑power methodologies, and static verification flows to peak performance.

You’ll blend technical mastery with customer leadership, partnering with R&D to shape next‑generation methodologies and ensure our tools deliver industry‑leading results.

• Job Responsibilities
• Deliver expert technical guidance to customers across synthesis, low‑power verification, and logical equivalence checking.
• Enable customers to maximize the value of Cadence technologies by aligning tool capabilities with project goals, design requirements, and schedules.
• Present technical content through compelling presentations, hands‑on training sessions, and product demonstrations that accelerate customer proficiency.
• Lead technical evaluations and benchmarks to successful completion while clearly demonstrating tool advantages and methodology strengths.
• Collaborate closely with R&D to refine tools, influence feature development, and ensure solutions meet evolving customer requirements.
• Drive adoption and expansion of Cadence tools and methodologies within customer design teams.
• Enhance design flows by developing and modifying automation using TCL and other programming skills to improve accuracy, efficiency, and quality of results.
• Document and standardize best practices and lessons learned from customer engagements to increase efficiency and raise the likelihood of success in future projects.
• Job Qualifications
• Bachelor’s or Master’s degree in Electrical/Electronic Engineering, Microelectronics, or a related technical field.
• 5+ years of hands‑on experience in digital design implementation within the semiconductor industry.
• Proficiency in UNIX/Linux environments with strong scripting skills in C‑shell, TCL/Tk, and Python.
• Deep understanding of digital design fundamentals, semiconductor principles, and low‑power architecture methodologies.
• Advanced expertise in digital synthesis, preferably using Cadence Genus.
• Knowledge of a hardware description language, such as System Verilog or VHDL.
• Excellent communication skills, with fluency in English and the ability to convey complex concepts clearly.
• Strong customer‑facing presence, demonstrating effective problem‑solving, technical leadership, and relationship‑building abilities.
• Collaborative mindset, combining technical passion with an understanding of customer needs and business priorities.
• Additional Skills/Preferences
• Experience with job scheduling systems.
• Familiarity with version control systems used in collaborative design environments.
• Ability to analyze and optimize design Qo R (timing, area, power) across synthesis and low‑power flows.
• Proactive approach to expanding technical knowledge and capabilities.
• Self‑motivated and proactive, with the ability to drive tasks forward with minimal supervision.
• Strong analytical and problem‑solving skills, especially in complex design or debug scenarios.
• Ability to work independently, prioritize tasks effectively, and manage multiple customer engagements simultaneously.
• Demonstrated ownership mindset, taking initiative to identify issues, propose solutions, and follow through to resolution.
• Adaptability in dynamic environments, with the capacity to learn new tools, flows, and methodologies quickly.
• Additional Areas of Experience
• Digital circuit design (RTL design).
• Logic Equivalence Checking, preferably using Cadence Conformal.
• SDC creation and validation.
• UPF development and verification.
• CAD/EDA support for digital IC design flows, with emphasis on synthesis, LEC, and CLP verification.
• Static Timing Analysis (STA).
• DFT insertion and related methodologies.
• Additional Information

Work in a collaborative, international team of highly skilled and passionate application engineers.

Engage closely with key stakeholders, including customers, Product Engineering, Marketing, and R&D teams, to shape successful design outcomes.

Focus primarily on Cadence’s digital implementation and static verification technologies, including Genus, Innovus Implementation System, and the Conformal tool family.

Access to world‑class internal training programs for continuous technical development.

Exposure to advanced semiconductor process nodes and next‑generation digital design methodologies.

Cross‑functional collaboration with global teams across multiple time zones.

Travel

Approximately 10% domestic travel may be required for customer visits, training, or technical workshops.

Equal Opportunity & Diversity Statement

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization.

We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

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