AI Memory Design Manager in Großmehring, München

Your work will drive chip innovation by developing and optimizing all aspects of the pre‑silicon design flow, including:Developing memory IP and compilers targeting AI applications optimized for TSMC processes.Designing test chips to validate memory IP.Conducting rigorous testing to ensure the reliability and scalability of developed solutions.ResponsibilitiesYou will be responsible for developing memory test chips and IP including:Conducting circuit design or RTL coding.Performing design verification.Reviewing and verifying layout reports.Preparing comprehensive design reports.Collaborating on test chip implementation.Assisting with silicon characterization and reliability qualification.Contributing to front‑end and back‑end design kit generation.Analyzing and debugging silicon data.Providing technical support to customers.QualificationsQualifications include:Master’s degree or higher in Electrical Engineering or a related field.Over 10 years of experience in circuit or logic design for non‑volatile memory technologies, including flash memory, RRAM, MRAM, or PCRAM.Over 5 years of experience in compute‑in‑memory or AI algorithms is considered a strong advantage.Proficient in utilizing EDA tools and applying design methodologies for both custom and digital design of non‑volatile memory. #J-18808-Ljbffr