HW Design and Verification Engineer

Job Description

You will perform VHDL coding and pre-silicon RTL verification of components of the videantis programmable multicore processor architecture. You will perform physical-aware synthesis using, e.g., Synopsys Design Compiler, Design Compiler Graphical, HDL simulation using, e.g., Mentor Modelsim/Questa, and FPGA prototyping using Xilinx or Intel/Altera toolflows. Your verification work will include developing test plans, writing testbenches and regression tests to achieve sign-off coverage, and debugging issues across hardware and software. All verification results will be thoroughly documented for sign-off of production-ready deliverables. FPGA prototyping of complete multicore processor system configurations will be used to verify functional correctness of vision and video processing with near-realtime throughput. For this, you will setup and maintain an FPGA prototyping flow and perform the mapping, bring-up, and debugging of the targeted processor system configurations and related software applications.

Your main responsibilities are:

• Coding of logic blocks of programmable processor architectures in VHDL according to functional specifications
• Perform physically-aware synthesis and optimization in advanced technology nodes
• Develop test plans and write testbenches and regression tests
• Perform HDL simulation of components of programmable multicore processor architectures
• Setup and maintain an FPGA toolflow
• Perform FPGA mapping and prototyping of programmable multicore processor systems
• Debug issues across hardware and software
• Sign-off verification of production deliverables
• Sign-off documentation of verification results

Location

The position is located in Hannover.

Desired Skills & Experience

• MS or BS degree in Engineering or Science
• Minimum 5 years, preferred 10 years of relevant professional experience
• Proficiency in Linux/Unix and scripting languages
• Thorough work attitude and attention to detail while meeting strict deadlines
• Proficiency in VHDL and Verilog
• Experience in physically-aware standard-cell synthesis in advanced technology nodes (16nm and beyond)
• Experience in developing test plans and writing testbenches
• Familiarity with Mentor Modelsim/Questa and/or other HDL simulation tools
• Proficiency in FPGA prototyping using Xilinx and/or Intel/Altera toolflows
• Good knowledge of programmable processor architecture
• Good English language skills (written and verbal)

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